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USB2250/50i/51/51i
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
PRODUCT FEATURES
The SMSC USB2250/50i/51/51i is a USB 2.0 compliant, HiSpeed mass storage class peripheral controller intended for reading and writing to more than 24 popular flash media formats from the CompactFlash(R) (CF), SmartMediaTM (SM), xD-Picture Card TM (xD) 1 , Memory Stick (R) (MS), Secure Digital (SD), and MultiMediaCardTM (MMC) families. The SMSC USB2250/50i/51/51i is a fully integrated, single chip solution capable of ultra high performance operation. Average sustained transfer rates exceeding 35 MB/s are possible if the media and host can support those rates.
Datasheet
GPIO configuration and polarity
-- Up to 11 GPIOs (based on configuration) for special function use -- Four GPIO's with up to 200 mA drive
General Description
16 additional GPIO's are available if CF is not used On board 24 MHz crystal driver circuit Optional external 24 MHz clock input 4 Independent internal card power FETs
-- 200 mA each -- "Fold-back" short circuit protection
8051 8-bit microprocessor
-- 60 MHz - single cycle execution -- 64 KB ROM | 14 KB RAM
General Features
128-pin VTQFP (14x14 mm) lead-free RoHS compliant package Targeted for applications in which single or "combo" media sockets are used Supports multiple simultaneous card insertions Flexible assignment of number of LUNs and how card types are associated with the LUNs Hardware-controlled data flow architecture for all selfmapped media Pipelined hardware support for access to non-selfmapped media Order number with "i" denotes the version that supports the industrial temperature range of -40C to 85C Single chip flash media controller with non-multiplexed interface for independent card sockets Flash Media Specification Revision Compliance
-- CompactFlash 4.1 -- Secure Digital 2.0 -- MultiMediaCard 4.2
Internal regulator for 1.8 V core operation Optimized pinout improves signal routing which eases implementation for improved signal integrity
OEM Selectable Features
Vendor, product, and language IDs Manufacturer ID and product strings (28 character) Serial number string (12h digit max) Customizable vendor specific data by optional use of external serial EEPROM Bus- or self-powered selection LED blink interval or duration Internal power FET configuration Optimized for low latency interrupt handling Reduced memory footprint Device Firmware Upgrade (DFU) support of external EEPROM or External Flash
-- Assembly line support -- End user field upgrade support -- DFU Package consists of driver, firmware, sample DFU application and source code, DFU driver API
Software Features Hardware Features
SDIO and MMC Streaming Mode support
-- -- -- -- -- -- Memory Stick 1.43 Memory Stick Pro Format 1.02 Memory Stick Duo Format 1.10 Memory Stick Pro-HG Duo Format 1.01 xD-Picture Card 1.2 SmartMedia 1.3
Optional custom firmware with up to 128 KB external ROM
Applications
Extended configuration options
-- xD player mode operation -- Socket switch polarities, etc.
Media Activity LED
Flash Media Card Reader/Writer Printers Desktop and Mobile PCs Consumer A/V Media Players/Viewers Vista ReadyBoostTM
1.) xD-Picture Card not applicable to USB2251.
SMSC USB2250/50i/51/51i
DATASHEET
Revision 2.0 (09-29-09)
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
ORDER NUMBER:
CompactFlash(R) Memory Stick(R) Secure Digital MultiMediaCardTM SmartMediaTM
Part Number
xD-Picture CardTM
Operational temperature
0C to 70C -40C to 85C 0C to 70C -40C to 85C
USB2250-NU-XX USB2250i-NU-XX USB2251-NU-XX USB2251i-NU-XX 128-Pin VTQFP Lead-Free RoHS Compliant Package
"XX" in the order number indicates the internal ROM firmware revision level. Please contact your SMSC sales representative for more information.
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright (c) 2009 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation ("SMSC"). Product names and company names are the trademarks of their respective holders. SMSC makes the following part-numbered device available for purchase only by customers who are xD-Picture Card licensees: USB2250/USB2250i. By purchasing or ordering any of such devices, Buyer represents, warrants, and agrees that Buyer is a duly licensed Licensee under an xD-Picture CardTM License Agreement with Fuji Photo Film Co., Ltd., Olympus Optical Co., Ltd., and Toshiba Corporation; and that Buyer will maintain in effect such xD-Picture Card license and will give SMSC reasonable advance notice of any termination or expiration of such xD-Picture Card license, but in no event less than five days advance notice. SMSC may discontinue making such devices available for purchase by Buyer and/or discontinue further deliveries of such devices if such xD-Picture Card license shall expire, terminate, or cease to be in force, or if Buyer is or becomes in default of such xD-Picture Card license. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
Table of Contents
Chapter 1 Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Chapter 2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Chapter 3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chapter 5 Pin Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 128-Pin Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chapter 6 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.1 6.2 128-Pin VTQFP Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Chapter 7 Pin Reset State Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1 128-Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Chapter 8 Configuration Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.1 8.2 Card Reader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.1.1 VBus Detect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2.1 EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2.2 EEPROM Data Descriptor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2.3 EEPROM Data Descriptor Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2.4 A0h-A7h: Device Power Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.2.5 Device ID Strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default Configuration Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.3.1 External Hardware nRESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.3.2 USB Bus Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 24 24 24 25 27 31 32 34 34 35
8.3
Chapter 9 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
9.1 9.2 9.3 Oscillator/Crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Ceramic Resonator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 External Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Chapter 10 DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
10.1 10.2 10.3 10.4 10.5 Maximum Guaranteed Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Thermal Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 39 39 41 42
Chapter 11 GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Chapter 12 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
List of Tables
Table 5.1 128-Pin VTQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 6.2 Buffer Type Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 7.1 Legend for Pin Reset States Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 7.2 USB2250/50i/51/51i 128-Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 8.1 Internal Flash Media Controller Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 8.2 nRESET Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 9.1 Crystal Circuit Legend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 10.1 Pin Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 10.2 128-Pin VTQFP Package Thermal Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 11.1 GPIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 20 21 22 25 35 36 41 42 43
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
List of Figures
Figure 3.1 Figure 4.1 Figure 7.1 Figure 7.2 Figure 8.1 Figure 9.1 Figure 9.2 Figure 9.3 Figure 10.1 Figure 12.1 128-Pin VTQFP Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 USB2250/50i/51/51i Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 128-Pin Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 nRESET Timing for EEPROM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Typical Crystal Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Capacitance Formulas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Ceramic Resonator Usage with SMSC IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Supply Rise Time Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 128-Pin VTQFP, 14x14x1.0 mm Body, 2.0 mm Pitch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
Chapter 1 Acronyms
ATA: Advanced Technology Attachment CFC: Compact Flash Controller FET: Field Effect Transistor LUN: Logical Unit Number MMC: MultiMediaCard MSC: Memory Stick Controller PLL: Phase-Locked Loop RoHS: Restriction of Hazardous Substances Directive RXD: Received eXchange Data SDIO: Secure Digital Input/Output SDC: Secure Digital Controller SIE: Serial Interface Engine SMC: SmartMedia Controller True IDE Mode: True Integrated Drive Electronics Mode TXD: Transmit eXchange Data UART: Universal Asynchronous Receiver-Transmitter UCHAR: Unsigned Character UINT: Unsigned Integer VTQFP: Very Thin Quad Flat Package
*Note: In order to develop, make, use, or sell readers and/or other products using or incorporating any of the SMSC devices made the subject of this document or to use related SMSC software programs, technical information and licenses under patent and other intellectual property rights from or through various persons or entities, including without limitation media standard companies, forums, and associations, and other patent holders may be required. These media standard companies, forums, and associations include without limitation the following: Sony Corporation (Memory Stick, Memory Stick Pro); SD3 LLC (Secure Digital); MultiMedia Card Association (MultiMediaCard); the SSFDC Forum (SmartMedia); the Compact Flash Association (Compact Flash); and Fuji Photo Film Co., Ltd., Olympus Optical Co., Ltd., and Toshiba Corporation (xD-Picture Card). SMSC does not make such licenses or technical information available; does not promise or represent that any such licenses or technical information will actually be obtainable from or through the various persons or entities (including the media standard companies, forums, and associations), or with respect to the terms under which they may be made available; and is not responsible for the accuracy or sufficiency of, or otherwise with respect to, any such technical information. SMSC's obligations (if any) under the Terms of Sale Agreement, or any other agreement with any customer, or otherwise, with respect to infringement, including without limitation any obligations to defend or settle claims, to reimburse for costs, or to pay damages, shall not apply to any of the devices made the subject of this document or any software programs related to any of such devices, or to any combinations involving any of them, with respect to infringement or claimed infringement of any existing or future patents related to solid state disk or other flash memory technology or applications ("Solid State Disk Patents"). By making any purchase of any of the devices made the subject of this document, the customer represents, warrants, and agrees that it has obtained all necessary licenses under then-existing Solid State Disk Patents for the manufacture, use and sale of solid state disk and other flash memory products and that the customer will timely obtain at no cost or expense to SMSC all necessary licenses under Solid State Disk Patents; that the manufacture and testing by or for SMSC of the units of any of the devices made the subject of this document which may be sold to the customer, and any sale by SMSC of such units to the customer, are valid exercises of the customer's rights and licenses under such Solid State Disk Patents; that SMSC shall have no obligation for royalties or otherwise under any Solid State Disk Patents by reason of any such manufacture, use, or sale of such units; and that SMSC shall have no obligation for any costs or expenses related to the customer's obtaining or having obtained rights or licenses under any Solid State Disk Patents. SMSC MAKES NO WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, IN REGARD TO INFRINGEMENT OR OTHER VIOLATION OF INTELLECTUAL PROPERTY RIGHTS. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES AGAINST INFRINGEMENT AND THE LIKE. No license is granted by SMSC expressly, by implication, by estoppel or otherwise, under any patent, trademark, copyright, mask work right, trade secret, or other intellectual property right. **To obtain this software program the appropriate SMSC Software License Agreement must be executed and in effect. Forms of these Software License Agreements may be obtained by contacting SMSC.
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DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
Chapter 2 Overview
The SMSC USB2250/50i/51/51i is a flash media card reader solution fully compliant with the USB 2.0 specification. All required resistors on the USB ports are integrated into the device. This includes all series termination resistors on D+ and D- pins and all required pull-down and pull-up resistors. The over-current sense inputs for the downstream facing ports have internal pull-up resistors.
Hardware Features
Single chip flash media controller USB2250/USB2251 supports the commercial temperature range of 0C to +70C USB2250i/USB2251i supports the industrial temperature range of -40C to +85C Up to 11 GPIOs: Configuration and polarity for special function use such as LED indicators, button inputs, and power control to memory devices - The number of actual GPIOs depends on the implementation configuration used - Four GPIOs available with up to 200 mA drive and "fold-back" short circuit protection 8051 8-bit microprocessor - 60 MHz - single cycle execution - 64 KB ROM |14 KB RAM Integrated regulator for 1.8 V core operation Flash Media Card Specification Revision Compliance Compact Flash 4.1 - CF UDMA Modes 0-4 - CF PIO Modes 0-6 Secure Digital 2.0 - HS-SD and HC-SD - TransFlashTM and reduced form factor media MultiMediaCard 4.2 - 1/4/8 bit MMC Memory Stick 1.43 Memory Stick Pro Format 1.02 Memory Stick Pro-HG Duo Format 1.01 - Memory Stick, MS Duo, HS-MS, MS Pro-HG, MS Pro Memory Stick Duo 1.10 Smart Media 1.3 xD-Picture Card 1.2
Software Features
If the OEM is using an external EEPROM, the following features are available: - Customizable vendor, product, and device ID's - 12-hex digits maximum for the serial number string - 28-character manufacturer ID and product strings for the flash media reader/writer
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
Chapter 3 Pin Configuration
MS_D6 GPIO12 (MS_INS) MS_D3 MS_D7 MS_SCLK VSS TEST VDD33 GPIO6 (SD_WP) MA7 MA13 MA6 MA8 MA5 MA9 MA4 MA11 MA3 nMRD MA2 CF_DMARQ / RXD / GPIO2 GPIO4 (SCL / xD_ID) CF_DMACK / TXD / GPIO7 LED / GPIO1 GPIO3 (VBUS_DET) VSS XTAL2 XTAL1 (CLKIN) VDD18PLL VSS RBIAS VDD33
96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
MS_D2 MS_D4 MS_D0 / MS_SDIO MS_D5 MS_D1 MS_BS CF_D10 / GPIO26 CF_D9 / GPIO25 CF_D2 / GPIO18 CF_D8 / GPIO24 CF_D1 / GPIO17 CF_D0 / GPIO16 CF_SA0 CF_SA1 CF_SA2 VSS CF_IORDY CF_nRESET GPIO9 / CRD_PWR1 VDD33 GPIO10 / CRD_PWR2 VSS CF_IRQ CF_nIOW CF_nIOR CF_nCS0 CF_D15 / GPIO31 CF_D7 / GPIO23 CF_D14 / GPIO30 CF_D6 / GPIO22 CF_D13 / GPIO29 VDD33
97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128
SMSC USB225X 128 VTQFP
(Top View)
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
nRESET CF_D5 / GPIO21 CF_D12 / GPIO28 CF_D4 / GPIO20 CF_D11 / GPIO27 CF_D3 / GPIO19 GPIO13 (CF_nCD) GPIO14 (SM_nCD) SM_nB/R SM_nRE SM_nCE SM_CLE SM_ALE VSS VDD33 VDD18 SM_nWE SM_nWP SM_D0 SM_D1 SM_D2 SM_D3 SM_D4 SM_D5 SM_D6 SM_D7 SM_nWPS MD0 MD1 MD2 MD3 MD7
Revision 2.0 (09-29-09)
MA12 MA15 nMWR MA14 GPIO5 (SDA) REG_EN USB+ USBVSS SD_D1 SD_D6 SD_D0 SD_D7 GPIO8 / CRD_PWR0 VDD33 GPIO11 / CRD_PWR3 VSS SD_CLK SD_D5 SD_CMD SD_D4 SD_D3 SD_D2 MA10 MA1 / CLK_SEL1 nMCE MA0 / CLK_SEL0 MA16 MD6 MD5 MD4 GPIO15 (SD_nCD)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 3.1 128-Pin VTQFP Diagram
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
Chapter 4 Block Diagram
USB2250 / USB2251
USB Host PHY
AUTO_CBW PROC FMI
SD/ MMC
CF/
GPIO (16)
SIE CTL
BUS INTFC
BUS FMDU INTFC CTL
MS
3.3 V
SM EP0 TX EP0 RX 1.8 V Reg
VDD18
BUS INTFC
RAM EP1 RX EP1 TX EP2 RX EP2 TX
4K total
24 MHz Crystal
PLL
VDD18PLL
XDATA BRIDGE + BUS ARBITER PWR_FET0 PWR_FET1 PWR_FET2 PWR_FET3 GPIOs RAM 10 KB ROM 64 KB Clock Generation and Control 8051 PROCESSOR SFR RAM
GPIO8 / CRD_PWR0 GPIO9 / CRD_PWR1 GPIO10 / CRD_PWR2 GPIO11 / CRD_PWR3
3.3 V
1.8 V Reg
11 pins
ADDR MAP
Program Memory I/O Bus
Figure 4.1 USB2250/50i/51/51i Block Diagram
SMSC USB2250/50i/51/51i
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DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
Chapter 5 Pin Table
5.1 128-Pin Package
Table 5.1 128-Pin VTQFP Package COMPACT FLASH INTERFACE (28 PINS) CF_D0 / GPIO16 CF_D4 / GPIO20 CF_D8 / GPIO24 CF_D12 / GPIO28 CF_nIOR CF_IORDY CF_D1 / GPIO17 CF_D5 / GPIO21 CF_D9 / GPIO25 CF_D13 / GPIO29 CF_nIOW CF_nCS0 CF_D2 / GPIO18 CF_D6 / GPIO22 CF_D10 / GPIO26 CF_D14 / GPIO30 CF_IRQ CF_DMACK / TXD / GPIO7 GPIO13 (CF_nCD) CF_D3 / GPIO19 CF_D7 / GPIO23 CF_D11 / GPIO27 CF_D15 / GPIO31 CF_nRESET CF_SA0 CF_DMARQ / RXD / GPIO2
CF_SA1
CF_SA2
SMARTMEDIA INTERFACE (17 PINS) SM_D0 SM_D4 SM_ALE SM_nWP SM_nWPS MEMORY STICK INTERFACE (11 PINS) MS_BS MS_D1 MS_D5 MS_D0 / MS_SDIO MS_D2 MS_D6 MS_SCLK MS_D3 MS_D7 GPIO12 (MS_INS) MS_D4 SM_D1 SM_D5 SM_CLE SM_nB/R SM_D2 SM_D6 SM_nRE SM_nCE SM_D3 SM_D7 SM_nWE GPIO14 (SM_nCD)
SECURE DIGITAL / MULTIMEDIACARD INTERFACE (12 PINS) SD_CMD SD_D2 SD_D4 SD_CLK SD_D3 SD_D5 SD_D0 GPIO6 (SD_WP) SD_D6 SD_D1 GPIO15 (SD_nCD) SD_D7
USB INTERFACE (6 PINS) USB+ USBRBIAS
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Table 5.1 128-Pin VTQFP Package (continued) XTAL2 XTAL1 (CLKIN) REG_EN
MEMORY/IO INTERFACE (28 PINS) MA0 / CLK_SEL0 MA4 MA8 MA12 MA16 MD3 MD7 MA1 / CLK_SEL1 MA5 MA9 MA13 MD0 MD4 nMRD MISC (10 PINS) nRESET LED / GPIO1 GPIO11 / CRD_PWR3 GPIO3 (VBUS_DET) GPIO8 / CRD_PWR0 TEST DIGITAL, POWER (16 PINS) (6) VDD33 (8) VSS TOTAL 128 VDD18 VDD18PLL GPIO4 (SCL / xD_ID) GPIO9 / CRD_PWR1 GPIO5 (SDA) GPIO10 / CRD_PWR2 MA2 MA6 MA10 MA14 MD1 MD5 nMWR MA3 MA7 MA11 MA15 MD2 MD6 nMCE
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Chapter 6 Pin Descriptions
This section provides a detailed description of each signal. The signals are arranged in functional groups according to their associated interface. The pin descriptions are applied when using the internal default firmware and can be referenced in Chapter 8, "Configuration Options," on page 24. Please reference Chapter 1, "Acronyms," on page 6 for a list of the acronyms used. The "n" symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage level. When "n" is not present in the signal name, the signal is asserted at the high voltage level. The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of "active low" and "active high" signals. The term assert, or assertion, indicates that a signal is active, independent of whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inactive.
6.1
128-Pin VTQFP Pin Descriptions
Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions
NAME SYMBOL 128-PIN VTQFP BUFFER TYPE DESCRIPTION
COMPACT FLASH (CF) INTERFACE CF Chip Select 0 CF_nCS0 71 O12PU This pin is the active low chip select 0 signal for the task file registers of the CF ATA device in True IDE mode. This pin has a weak internal pull-up resistor. These pins are the register select address bits for the CF ATA device. This is the active high interrupt request signal from the CF device. This pin has a weak internal pull-down resistor. CF_D[15:8]: These pins are the bi-directional data signals CF_D15 - CF_D8 in True IDE mode data transfer. In True IDE mode, all task file register operations occur on CF_D[7:0], while data transfer occurs on CF_D[15:0]. These bi-directional data signals have weak internal pull-down resistors. I/O12 GPIO[31:24]: These pins may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function.
CF Register Address CF Interrupt
CF_SA[2:0]
82 83 84 74
I/O12
CF_IRQ
IPD
CF Data 15-8 / GPIO
CF_D[15:8] /
70 68 66 62 60 90 89 87
I/O12PD
GPIO[31:24]
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Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued)
NAME CF Data 7-0 / GPIO SYMBOL CF_D[7:0] / 128-PIN VTQFP 69 67 63 61 59 88 86 85 BUFFER TYPE I/O12PD DESCRIPTION CF_D[7:0]: These pins are the bi-directional data signals CF_D7 - CF_D0 in True IDE mode data transfer. In True IDE mode, all of the task file register operations occur on CF_D[7:0], while data transfer occurs on CF_D[15:0]. These bi-directional data signals have weak internal pull-down resistors. I/O12 GPIO[23:16]: These pins may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. This pin is the active high input signal for IORDY. This pin has a weak internal pull-up resistor. This is a GPIO designated by the default firmware as the Compact Flash card detection pin. This pin is an active low hardware reset signal to the CF device. This pin is an active low read strobe signal for the CF device. This pin is an active low write strobe signal for the CF device. CF_DMARQ: This pin is the DMA request from the device to the CF controller. RXD: The signal can be used as input to the RXD of UART in the device. Custom firmware is required to activate this function. I/O12 GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. CF_nDMACK: This pin is an active low DMA acknowledge signal for the CF device. TXD: GPIO7 can be used as an output TXD of UART in the device. Custom firmware is required to activate this function. I/O12 GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function.
GPIO[23:16]
IO Ready
CF_IORDY
80
IPU
CF Card Detection1 CF Hardware Reset CF IO Read CF IO Write Strobe CF DMA request
GPIO13 (CF_nCD) CF_RESET_N CF_nIOR CF_nIOW CF_DMARQ /
58
I/O12
79 72 73 117
O12 O12 O12 I
RXD / GPIO2
CF DMA acknowledge
CF_DMACK / TXD / GPIO7
119
O12
SMARTMEDIA (SM) INTERFACE SM Write Protect SM_nWP 47 O12PD This pin is an active low write protect signal for the SM device and has a weak pull-down resistor that is permanently enabled.
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Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued)
NAME SM Address Strobe SYMBOL SM_ALE 128-PIN VTQFP 52 BUFFER TYPE O12PD DESCRIPTION This pin is an active high Address Latch Enable signal for the SM device and has a weak pull-down resistor that is permanently enabled. This pin is an active high Command Latch Enable signal for the SM device and has a weak pull-down resistor that is permanently enabled. These pins are the bi-directional data signals SM_D7-SM_D0 and have weak internal pulldown resistors.
SM Command Strobe
SM_CLE
53
O12PD
SM Data 7-0
SM_D[7:0]
39 40 41 42 43 44 45 46 55
I/O12PD
SM Read Enable
SM_nRE
O12PU
This pin is an active low read strobe signal for the SM device. When using the internal FET, this pin has a weak internal pull-up resistor that is tied to the output of the internal power FET. If an external FET is used (internal FET is disabled), then the internal pull-up is not available (external pull-ups must be used).
SM Write Enable
SM_nWE
48
O12PU
This pin is an active low write strobe signal for the SM device. When using the internal FET, this pin has a weak internal pull-up resistor that is tied to the output of the internal power FET. If an external FET is used (internal FET is disabled), then the internal pull-up is not available (external pull-ups must be used).
SM Write Protect Switch SM Busy or Data Ready
SM_nWPS
38
IPU
A write-protect seal is detected when this pin is low. This pin has a weak internal pull-up resistor. This pin is connected to the BSY/RDY pin of the SM device. When using the internal FET, this pin has a weak internal pull-up resistor that is tied to the output of the internal power FET. If an external FET is used (internal FET is disabled), then the internal pull-up is not available (external pull-ups must be used).
SM_nB/R
56
IPU
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Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued)
NAME SM Chip Enable SYMBOL SM_nCE 128-PIN VTQFP 54 BUFFER TYPE O12PU DESCRIPTION This pin is the active low chip enable signal to the SM device. When using the internal FET, this pin has a weak internal pull-up resistor that is tied to the output of the internal power FET. If an external FET is used (internal FET is disabled), then the internal pull-up is not available (external pull-ups must be used). SM Card Detection GPIO GPIO14 (SM_nCD) 57 I/O12 This is a GPIO designated by the default firmware as the Smart Media card detection pin.
MEMORY STICK (MS) INTERFACE MS Bus State MS_BS 91 O12 This pin is connected to the bus state pin of the MS device. It is used to control the bus states 0, 1, 2 and 3 (BS0, BS1, BS2 and BS3) of the MS device. MS Card Insertion GPIO MS System CLK GPIO12 (MS_INS) MS_SCLK 98 IPU This is a GPIO designated by the default firmware as the Memory Stick card detection pin. This pin is an output clock signal to the MS device. The clock frequency is software configurable. MS_D[7:1]: These pins are the bi-directional data signals for the MS device. MS_D2 and MS_D3 have weak pull-down resistors. MS_D1 has a pull-down resistor if it is in parallel mode, otherwise it is disabled. In 4- or 8-bit parallel mode, each MS_D7:1 signal has a weak pull-down resistor. I/O12PD MS_D0: This pin is one of the bi-directional data signals for the MS device. In serial mode, the most significant bit (MSB) of each byte is transmitted first by either MSC or the MS device on MS_D0, MS_D2, and MS_D3 (which have weak pull-down resistors). If MS_D1 is in parallel mode, it has a pull-down resistor; Otherwise, it is disabled. In 4- or 8-bit parallel mode, the MS_D0 signal has a weak pull-down resistor. MS_SDIO MS_SDIO: Serial Data Bus. This pin is responsible for transfer direction and types of data change depending on the bus state.
101
O12
MS System Data In/Out
MS_D[7:1]
100 97 93 95 99 96 92
I/O12PD
MS System Data In/Out
MS_D0 /
94
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Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued)
NAME SYMBOL 128-PIN VTQFP BUFFER TYPE DESCRIPTION
SECURE DIGITAL (SD) / MULTIMEDIACARD (MMC) INTERFACE SD Data 7-0 SD_D[7:0] 13 11 19 21 22 23 10 12 18 I/O12PU These pins are bi-directional data signals SD_D0 - SD_D7 and have weak pull-up resistors.
SD Clock
SD_CLK
O12
This is an output clock signal to the SD/MMC device. The clock frequency is software configurable.
SD Command
SD_CMD
20
I/O12PU
This is a bi-directional signal that connects to the CMD signal of the SD/MMC device and has a weak internal pull-up resistor. This is a GPIO designated by the default firmware as the Secure Digital card mechanical write detect pin. This is a GPIO designated by the default firmware as the Secure Digital card detection pin.
SD Write Protected GPIO SD Card Detect GPIO
GPIO6 (SD_WP) GPIO15 (SD_nCD)
105
I/O12
32
I/O12
USB INTERFACE USB Bus Data USB Transceiver Bias 24 MHz Crystal Input (External Clock Input) USB+ USBRBIAS 7 8 127 I/O-U I-R These pins connect to the USB bus data signals. A 12.0 k, 1.0% resistor is attached from VSS to this pin in order to set the transceiver's internal bias currents. This pin can be connected to one terminal of the crystal or it can be connected to an external 24/48 MHz clock when a crystal is not used. The MA[1:0] pins will be sampled while RESET_N is asserted, and the value will be latched upon RESET_N negation. This will determine the clock source and value. 24 MHz Crystal Output XTAL2 123 OCLKx This is the other terminal of the crystal, or it is left open when an external clock source is used to drive XTAL1(CLKIN). It may not be used to drive any external circuitry other than the crystal circuit.
XTAL1 (CLKIN)
124
ICLKx
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Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued)
NAME SYMBOL 128-PIN VTQFP BUFFER TYPE DESCRIPTION
MEMORY / IO INTERFACE Memory Data Bus MD[7:0] 33 29 30 31 34 35 36 37 28 2 4 107 1 113 24 111 109 106 108 110 112 114 116 25 27 I/O12PU These signals are used to transfer data between the internal CPU and the external program memory and have weak internal pullup resistors.
Memory Address Bus
MA16 MA[15:2]
O12 O12
These signals address memory locations within the external memory. These signals address memory locations within the external memory.
MA[1:0] / CLK_ SEL[1:0]
O12 I/O12PD
MA[1:0]: These signals address memory locations within the external memory. CLK_SEL[1:0]: During RESET_N assertion, these pins will select the operating frequency of the external clock, and the corresponding weak pull-down resistors are enabled. When RESET_N is negated, the value on these pins will be latched internally and these pins will revert to MA[1:0] functionality; the internal pull-downs will be disabled. CLK_SEL[1:0] CLK_SEL[1:0] CLK_SEL[1:0] CLK_SEL[1:0] = = = = '00'. 24 MHz '01'. RESERVED '10'. RESERVED '11'. 48 MHz
If the latched value is '1', the corresponding MA pin is tri-stated when the chip is in power down state. If the latched value is '0', the corresponding MA pin will function identically to MA[15:3] pins at all times (other than during RESET_N assertion). Memory Write Strobe Memory Read Strobe nMWR nMRD 3 115 O12 O12 This pin is the active low program Memory Write strobe signal. This pin is the active low program Memory Read strobe signal.
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Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued)
NAME Memory Chip Enable SYMBOL nMCE 128-PIN VTQFP 26 BUFFER TYPE O12 DESCRIPTION This pin is the active low program Memory Chip Enable strobe signal. This signal is asserted when any external access is being done by the processor. This signal is held to the logic 'high' while RESET_N is asserted. MISC General Purpose Input/Output LED / GPIO1 120 I/O12 LED: GPIO1 can be used as an LED output. GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. 121 I/O12 This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. VBUS is a 3.3 volt input. A resistor divider must be used if connecting to 5 volts of USB power. GPIO4 118 I/O12 GPIO: This pin may be used either as input, edge sensitive interrupt input, or utput.Custom firmware is required to activate this function. SCL: This is the clock output when used with an external EEPROM. xD_ID: This is the xD-Picture Card detection pin only applicable to USB2250/USB2250i. This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. SDA: This is the data pin when used with an external serial EEPROM. GPIO8 / 14 I/O12 GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. CRD_PWR: Card power drive of 3.3 V at either 100 mA or 200 mA. GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. CRD_PWR: Card power drive of 3.3 V at either 100 mA or 200 mA.
GPIO3 (VBUS_DET)
(SCL / xD_ID) GPIO5 (SDA) 5
O12 I/O12 I/O12
CRD_PWR0 GPIO9 / 78
I/O200 I/O12
CRD_PWR1
I/O200
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Table 6.1 USB2250/50i/51/51i 128-Pin VTQFP Pin Descriptions (continued)
NAME General Purpose Input/Output SYMBOL GPIO10 / 128-PIN VTQFP 76 BUFFER TYPE I/O12 DESCRIPTION GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. Requirement: This must be the only FET used to power SM devices. Failure to do this will violate SM voltage specification on SM device pins. CRD_PWR2 GPIO11 / 16 I/O200 I/O12 CRD_PWR: Card power drive of 3.3 V at either 100 mA or 200 mA. GPIO: This pin may be used either as input, edge sensitive interrupt input, or output. Custom firmware is required to activate this function. CRD_PWR: Card power drive of 3.3 V at either 100 mA or 200 mA. This active low signal is used by the system to reset the chip. The active low pulse should be at least 1s wide. Tie this pin to ground for normal operation. This signal is used to enable the internal 1.8 V regulator.
CRD_PWR3 RESET Input RESET_N 64
I/O200 IS
TEST Input Regulator Enable
TEST REG_EN
103 6
I IPU
DIGITAL POWER, and GROUND 1.8 V Digital Core Power 1.8 V PLL Power VDD18 49 If the internal regulator is enabled, then this pin must have a 1.0 F (or greater) 20% (ESR <0.1 ) capacitor to VSS. If the internal regulator is enabled, then this pin must have a 1.0 F (or greater) 20% (ESR <0.1 ) capacitor to VSS. If the internal regulator is enabled, pins 50 and 128 each require an external bypass capacitor of 4.7 F minimum.
VDD18PLL
125
3.3 V Power and Voltage Regulator Input
VDD33
15 50 65 77 104 128 9 17 51 75 81 102 122 126
Ground
VSS
Ground Reference
Note 6.1 Note 6.2
Hot-insertion capable card connectors are required for all flash media. It is required for the SD connector to have a Write Protect switch. This allows the chip to detect the MMC card. nMCE is normally asserted except when the 8051 is in standby mode.
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6.2
Buffer Type Descriptions
Table 6.2 Buffer Type Descriptions BUFFER DESCRIPTION Input. Input with internal weak pull-up resistor. Input with internal weak pull-down resistor. Input with Schmitt trigger. Input/Output buffer with 12 mA sink and 12 mA source. Input/Output buffer 12 mA with FET disabled, 100/200 mA source only when the FET is enabled. Input/Output buffer with 12 mA sink and 12 mA source with an internal weak pull-down resistor. Input/Output buffer with 12 mA sink and 12 mA source with a pull-up resistor. Output buffer with 12 mA source. Output buffer with 12 mA sink and 12 mA source, with a pull-up resistor. Output buffer with 12 mA sink and 12 mA source, with a pull-down resistor. XTAL clock input. XTAL clock output. Analog Input/Output as defined in the USB 2.0 Specification. RBIAS.
I IPU IPD IS I/O12 I/O200 I/O12PD I/O12PU O12 O12PU O12PD ICLKx OCLKx I/O-U I-R
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Chapter 7 Pin Reset State Table
Hardware Initialization Voltage Signal (v) RESET Firmware Operational
VDD33
RESET
VSS
Time (t)
Figure 7.1 Pin Reset States Table 7.1 Legend for Pin Reset States Table SYMBOL
0 1 IP PU PD -Z
DESCRIPTION
Output driven low Output driven high Input enabled Hardware enables pull-up Hardware enables pull-down Hardware disables function Hardware disables pad. Both output driver and input buffers are disabled.
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7.1
128-Pin Reset States
Figure 7.2 128-Pin Reset States Table 7.2 USB2250/50i/51/51i 128-Pin Reset States
RESET STATE RESET STATE PU/ PD PIN PIN NAME FUNCTION INPUT/ OUTPUT PU/ PD
PIN
PIN NAME
FUNCTION
INPUT / OUTPUT
85 86 88 59 61 63 67 69 87 89 90 60 62 66 68 70 72 73 74 79 80 71 84 83 82 119
CF_D0 / GPIO16 CF_D1 / GPIO17 CF_D2 / GPIO18 CF_D3 / GPIO19 CF_D4 / GPIO20 CF_D5 / GPIO21 CF_D6 / GPIO22 CF_D7 / GPIO23 CF_D8 / GPIO24 CF_D9 / GPIO25 CF_D10 / GPIO26 CF_D11 / GPIO27 CF_D12 / GPIO28 CF_D13 / GPIO29 CF_D14 / GPIO30 CF_D15 / GPIO31 CF_nIOR CF_nIOW CF_nIRQ CF_nRESET CF_IORDY CF_nCS0 CF_SA0 CF_SA1 CF_SA2 CF_DMACK / TXD / GPIO7
GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO CF CF CF CF CF CF CF CF CF GPIO
z z z z z z z z z z z z z z z z z z z z z z z z z 0
---------------------------
58 46 45 44 43 42 41 40 39 52 53 47 38 57 91 101 94 92 96 99 95 93 97 100 98 20
GPIO13 (CF_nCD) SM_D0 SM_D1 SM_D2 SM_D3 SM_D4 SM_D5 SM_D6 SM_D7 SM_ALE SM_CLE SM_nWP SM_nWPS GPIO14 (SM_nCD) MS_BS MS_SCLK MS_D0 / MS_SDIO MS_D1 MS_D2 MS_D3 MS_D4 MS_D5 MS_D6 MS_D7 GPIO12 (MS_INS) SD_CMD
GPIO SM SM SM SM SM SM SM SM SM SM SM SM GPIO MS MS MS MS MS MS MS MS MS MS GPIO SD
IP z z z z z z z z z z z z IP z z z z z z z z z z IP z
pu pd pd pd pd pd pd pd pd pd pd pd -pu pd pd pd pd pd pd pd pd pd pd pu --
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Table 7.2 USB2250/50i/51/51i 128-Pin Reset States
RESET STATE PIN PIN NAME FUNCTION INPUT / OUTPUT PU/ PD PIN PIN NAME RESET STATE FUNCTION INPUT/ OUTPUT PU/ PD
117 12 10 23 22 21 19 11 13 105 32 27 25 116 114 112 110 108 106 109 111 24 113 107 28 37 36 35
CF_DMARQ / RXD / GPIO2 SD_D0 SD_D1 SD_D2 SD_D3 SD_D4 SD_D5 SD_D6 SD_D7 GPIO6 (SD_WP) GPIO15 (SD_nCD) MA0 / CLK_SEL0 MA1 / CLK_SEL1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA13 MA16 MD0 MD1 MD2
GPIO SD SD SD SD SD SD SD SD GPIO GPIO MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA MA
0 z z z z z z z z 0 IP IP IP IP IP 0 0 0 0 0 0 0 0 0 0 z z z
----------pu pd pd pd pd ----------pu pu pu
34 18 31 30 29 33 115 26 120 118 14 78 76 16 103 64 1 4 2 3 121 5 55 48 56 54 7 8
MD3 SD_CLK MD4 MD5 MD6 MD7 nMRD nMCE LED / GPIO1 GPIO4 (SCL / xD_ID) GPIO8 / CRD_PWR0 GPIO9 / CRD_PWR1 GPIO10 / CRD_PWR2 GPIO11 / CRD_PWR3 TEST nRESET MA12 MA14 MA15 nMWR GPIO3 (VBUS_DET) GPIO5 (SDA) SM_nRE SM_nWE SM_nB/R SM_nCE USB+ USB-
MA SD MA MA MA MA MA MA GPIO GPIO GPIO GPIO GPIO GPIO TEST nRESET MA MA MA MA GPIO GPIO SM SM SM SM USB+ USB-
z z z z z z 1 1 0 0 z z z z IP IP 0 0 0 1 IP 0 z z z z z z
pu -pu pu pu pu ---------------pu -------
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Chapter 8 Configuration Options
8.1 Card Reader
The SMSC USB2250/50i/51/51i is fully compliant with the following flash media card reader specifications: Compact Flash 4.1 - CF UDMA Modes 0-4 - CF PIO Modes 0-6 Secure Digital 2.0 - HS-SD and HC-SD - TransFlashTM and reduced form factor media MultiMediaCard 4.2 - 1/4/8 bit MMC Memory Stick 1.43 Memory Stick Pro Format 1.02 Memory Stick Pro-HG Duo Format 1.01 - Memory Stick, MS Duo, HS-MS, MS Pro-HG, MS Pro Memory Stick Duo 1.10 Smart Media 1.3 xD-Picture Card 1.2
8.1.1
VBus Detect
According to Section 7.2.1 of the USB 2.0 Specification, a device cannot provide power to its D+ or D- pull-up resistors unless the upstream port's VBUS is in the asserted (powered) state. The VBUS_DET pin on the device monitors the state of the upstream VBUS signal and will not pull-up the D+ resistor if VBUS is not active. If VBUS goes from an active to an inactive state (not powered), the device will remove power from the D+ pull-up resistor within 10 seconds.
8.2
8.2.1
System Configurations
EEPROM
The USB2250/50i/51/51i can be configured via a 2-wire (I2C) EEPROM (512x8) flash device containing the options for the USB2250/50i/51/51i. If an external configuration device does not exist the internal default values will be used. If one of the external devices is used for configuration, the OEM can update the values through the USB interface. The device will then "attach" to the upstream USB host. The USBDM tool set is available in the USB224x/USB225x Card Reader software release package. To download the software package from SMSC's website, please visit: https://www2.smsc.com/mkt/CW_SFT_PUB.nsf/Agreements/OBJ+Card+Reader to go to the OBJ Card Reader Software Download Agreement. Review the license, and if you agree, check the "I agree" box and then select "Confirm". You will then be able to download the USB224x/USB225x Card reader combo release package zip file containing the USBDM tool set. Please note that the following applies to the system values and descriptions when used: N/A = Not applicable to this part Reserved = For internal use
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8.2.2
EEPROM Data Descriptor
Table 8.1 Internal Flash Media Controller Configurations
ADDRESS 00h 01h 02h-19h 1Ah-1Bh 1Ch-1Dh 1Eh 1Fh 20h 21h 22h 23h 24h-31h 32h-5Dh 5Eh 5Fh 60h-99h 9Ah 9Bh 9Ch 9Dh 9Eh 9Fh A0h A1h
REGISTER NAME USB_SER_LEN USB_SER_TYP USB_SER_NUM USB_VID USB_PID USB_LANG_LEN USB_LANG_TYP USB_LANG_ID_LSB USB_LANG_ID_MSB USB_MFR_STR_LEN USB_MFR_STR_TYP USB_MFR_STR Reserved USB_PRD_STR_LEN USB_PRD_STR_TYP USB_PRD_STR USB_BM_ATT USB_MAX_PWR ATT_LB ATT_HLB ATT_LHB ATT_HB MS_PWR_LB MS_PWR_HB
DESCRIPTION USB Serial String Descriptor Length USB Serial String Descriptor Type USB Serial Number USB Vendor Identifier USB Product Identifier USB Language String Descriptor Length USB Language String Descriptor Type USB Language Identifier Least Significant Byte USB Language Identifier Most Significant Byte USB Manufacturer String Descriptor Length USB Manufacturer String Descriptor Type USB Manufacturer String USB Product String Descriptor Length USB Product String Descriptor Type USB Product String USB BmAttribute USB Max Power Attribute Lo byte Attribute Hi Lo byte Attribute Lo Hi byte Attribute Hi byte Memory Stick Device Power Lo byte Memory Stick Device Power Hi byte
25
INTERNAL DEFAULT VALUE 1Ah 03h "000000225001" (See Note 8.1) 0424 2250 04h 03h 09h (See Note 8.2) 04h (See Note 8.2) 10h 03h "Generic" (See Note 8.1) 00h 24h 03h "Flash Card Reader" (See Note 8.1) 80h 30h (96 mA) 40h (Reverse SD_WP only) 00h 00h 00h 08h 00h
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Table 8.1 Internal Flash Media Controller Configurations (continued) ADDRESS A2h A3h A4h A5h A6h A7h A8h A9h AAh - B0h B1h - B7h B8h - BEh BFh - C5h C6h - CDh CEh-D2h D3h D4h - D7h D8h - DAh DBh - DDh DEh-FBh FCh-FFh Note 8.1 REGISTER NAME CF_PWR_LB CF_PWR_HB SM_PWR_LB SM_PWR_HB SD_PWR_LB SD_PWR_HB LED_BLK_INT LED_BLK_DUR DEV0_ID_STR DEV1_ID_STR DEV2_ID_STR DEV3_ID_STR INQ_VEN_STR INQ_PRD_STR DYN_NUM_LUN DEV_LUN_MAP Reserved Reserved Not Applicable NVSTORE_SIG DESCRIPTION Compact Flash Device Power Lo byte Compact Flash Device Power Hi byte Smart Media Device Power Lo byte Smart Media Device Power Hi byte Secure Digital Device Power Lo byte Secure Digital Device Power Hi byte LED Blink Interval LED Blink After Access Device 0 Identifier String Device 1 Identifier String Device 2 Identifier String Device 3 Identifier String Inquiry Vendor String Inquiry Product String Dynamic Number of LUNs Device to LUN Mapping Non-Volatile Storage Signature INTERNAL DEFAULT VALUE 80h 00h 00h 08h 00h 80h 02h 28h "CF" "MS" "SM" "SD/MMC" "Generic" 2250 FFh FFh, FFh, FFh, FFh 00h, 03h, 07h 5Ch, 56h, 97h 00h "ATA2"
This value is a UNICODE UTF-16LE encoded string value that meets the USB 2.0 specification (Revision 2.0, 2000). Values in double quotations without this note are ASCII values. For a list of the most current 16-bit language ID's defined by the USB-IF, please visit http://www.unicode.org or consult The Unicode Standard, Worldwide Character Encoding, (Version 4.0), The Unicode Consortium, Addison-Wesley Publishing Company, Reading, Massachusetts.
Note 8.2
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8.2.3
8.2.3.1
BYTE 0
EEPROM Data Descriptor Register Descriptions
00h: USB Serial String Descriptor Length
NAME USB_SER_LEN DESCRIPTION USB serial string descriptor length as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bLength" which describes the size of the string descriptor (in bytes).
8.2.3.2
BYTE 1
01h: USB Serial String Descriptor Type
NAME USB_SER_TYP DESCRIPTION USB serial string descriptor type as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bDescriptorType" which is a constant value associated with a string descriptor type.
8.2.3.3
BYTE 25:2
02h-19h: USB Serial Number Option
NAME USB_SER_NUM DESCRIPTION Maximum string length is 12 hex digits. Must be unique to each device.
8.2.3.4
BYTE 1:0
1Ah-1Bh: USB Vendor ID Option
NAME USB_VID DESCRIPTION This ID is unique for every vendor. The vendor ID is assigned by the USB Implementer's Forum.
8.2.3.5
BYTE 1:0
1Ch-1Dh: USB Product ID Option
NAME USB_PID DESCRIPTION This ID is unique for every product. The product ID is assigned by the vendor.
8.2.3.6
BYTE 0
1Eh: USB Language Identifier Descriptor Length
NAME USB_LANG_LEN DESCRIPTION USB language ID string descriptor length as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bLength" which describes the size of the string descriptor (in bytes).
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8.2.3.7
BYTE 1
1Fh: USB Language Identifier Descriptor Type
NAME USB_LANG_TYP DESCRIPTION USB language ID string descriptor type as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bDescriptorType" which is a constant value associated with a string descriptor type.
8.2.3.8
BYTE 2
20h: USB Language Identifier Least Significant Byte
NAME USB_LANG_ID _LSB DESCRIPTION English language code = `0409'. See Note 8.2 to reference additional language ID's defined by the USB-IF.
8.2.3.9
BYTE 3
21h: USB Language Identifier Most Significant Byte
NAME USB_LANG_ID _MSB DESCRIPTION English language code = `0409'. See Note 8.2 to reference additional language ID's defined by the USB-IF.
8.2.3.10
BYTE 0
22h: USB Manufacturer String Descriptor Length
NAME USB_MFR_STR _LEN DESCRIPTION USB manufacturer string descriptor length as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bLength" which describes the size of the string descriptor (in bytes).
8.2.3.11
BYTE 1
23h: USB Manufacturer String Descriptor Type
NAME USB_MFR_STR _TYP DESCRIPTION USB manufacturer string descriptor type as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bDescriptorType" which is a constant value associated with a string descriptor type.
8.2.3.12
BYTE 15:2
24h-31h: USB Manufacturer String Option
NAME USB_MFR_STR DESCRIPTION Maximum string length is 29 characters.
8.2.3.13
BYTE 59:16
32h-5Dh: Reserved
NAME Reserved Reserved. DESCRIPTION
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8.2.3.14
BYTE 0
5Eh: USB Product String Descriptor Length
NAME USB_PRD_STR _LEN DESCRIPTION USB product string descriptor length as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bLength" which describes the size of the string descriptor (in bytes). Maximum string length is 29 characters
8.2.3.15
BYTE 1
5Fh: USB Product String Descriptor Type
NAME USB_PRD_STR _TYP DESCRIPTION USB product string descriptor type as defined by Section 9.6.7 "String" of the USB 2.0 Specification (Revision 2.0, 2000). This field is the "bDescriptorType" which is a constant value associated with a string descriptor type.
8.2.3.16
BYTE 59:2
60h-99h: USB Product String Option
NAME USB_PRD_STR DESCRIPTION This string will be used during the USB enumeration process in the Windows(R) operating system. Maximum string length is 29 characters.
8.2.3.17
BIT 7:0
9Ah: USB BmAttribute (1 byte)
NAME USB_BM_ATT DESCRIPTION Self- or Bus-Power: Selects between self- and bus-powered operation. The hub is either self-powered (draws less than 2 mA) or bus-powered (limited to 100 mA maximum power prior to being configured by the host controller). When configured as a bus-powered device, the SMSC device consumes less than 100 mA of current prior to being configured. After configuration, the bus-powered SMSC device (along with all associated device circuitry, any embedded devices if part of a compound device, and 100 mA per externally available downstream port) must consume no more than 500 mA of current. The current consumption is system dependent, and the OEM must ensure that the USB 2.0 Specification is not violated. When configured as a self-powered device, <1 mA of current is consumed and all ports are available, with each port being capable of sourcing 500 mA of current. 80 = Bus-powered operation (default) C0 = Self-powered operation A0 = Bus-powered operation with remote wake-up E0 = Self-powered operation with remote wake-up
8.2.3.18
BIT 7:0
9Bh: USB MaxPower (1 byte)
NAME USB_MAX_PWR DESCRIPTION USB Max Power per the USB 2.0 Specification. Do NOT set this value greater than 100 mA.
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8.2.3.19
9Ch-9Fh: Attribute Byte Descriptions
BYTE NAME ATT_LB
BYTE 0
BIT 3:0 4 Always reads `0'.
DESCRIPTION
Inquire Manufacturer and Product ID Strings `1' - Use the Inquiry Manufacturer and Product ID Strings. `0' (default) - Use the USB Descriptor Manufacturer and Product ID Strings.
5 6
Always reads `0'. Reverse SD Card Write Protect Sense `1' (default) - SD cards will be write protected when SW_nWP is high, and writable when SW_nWP is low. `0' - SD cards will be write protected when SW_nWP is low, and writable when SW_nWP is high.
7 1 ATT_HLB 3:0 4
Reserved. Always reads `0'. Activity LED True Polarity `1' - Activity LED to Low True. `0' (default) - Activity LED polarity to High True.
5
Common Media Insert / Media Activity LED `1' - The activity LED will function as a common media inserted/media access LED. `0' (default) - The activity LED will remain in its idle state until media is accessed.
6 7 2 ATT_LHB 0
Always reads `0'. Reserved. Attach on Card Insert / Detach on Card Removal `1' - Attach on Insert is enabled. `0' (default) - Attach on Insert is disabled.
1 2
Always reads `0'. Enable Device Power Configuration `1' - Custom Device Power Configuration stored in the NVSTORE is used. `0' (default) - Default Device Power Configuration is used.
7:3 3 ATT_HB 6:0 7
Always reads `0'. Always reads `0'. xD Player Mode
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8.2.4
A0h-A7h: Device Power Configuration
The USB2250/50i/51/51i has four internal FETs which can be utilized for card power. This section describes the default internal configuration. The settings are stored in NVSTORE and provide the following features: 1. A card can be powered by an external FET or by an internal FET. 2. The power limit can be set to 100 mA or 200 mA (Default) for the internal FET. Each media uses two bytes to store its device power configuration. Bit 3 selects between internal or external card power FET options. For internal FET card power control, bits 0 through 2 are used to set the power limit. The "Device Power Configuration" bits are ignored unless the "Enable Device Power Configuration" bit is set. See Section 8.2.3.19, "9Ch-9Fh: Attribute Byte Descriptions," on page 30.
8.2.4.1
A0h-A1h: Memory Stick Device Power Configuration
FET 0 1 2
TYPE FET Lo Byte MS_PWR_LB FET Hi Byte MS_PWR_HB
BITS 3:0 7:4 3:0
BIT TYPE Low Nibble High Nibble Low Nibble 0000b 0001b 1000b 1010b 0000b Disabled
DESCRIPTION
Disabled External FET enabled Internal FET with 100 mA power limit Internal FET with 200 mA power limit
3
7:4
High Nibble
0000b Disabled
8.2.4.2
A2h-A3h: Compact Flash Device Power Configuration
FET 0 1 2
TYPE FET Lo Byte CF_PWR_LB FET Hi Byte CF_PWR_HB
BITS 3:0 7:4 3:0
BIT TYPE Low Nibble High Nibble Low Nibble 0000b 0001b 1000b 1010b 0000b Disabled
DESCRIPTION
Disabled External FET enabled Internal FET with 100 mA power limit Internal FET with 200 mA power limit
3
7:4
High Nibble
0000b Disabled
8.2.4.3
A4h-A5h: Smart Media Device Power Configuration
FET 0 1
TYPE FET Lo Byte SM_PWR_LB
BITS 3:0 7:4
BIT TYPE Low Nibble High Nibble 0000b Disabled
DESCRIPTION
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FET 2
TYPE FET Hi Byte SM_PWR_HB
BITS 3:0
BIT TYPE Low Nibble 0000b 0001b 1000b 1010b
DESCRIPTION Disabled External FET enabled Internal FET with 100 mA power limit Internal FET with 200 mA power limit
3
7:4
High Nibble
0000b Disabled
8.2.4.4
A6h-A7h: Secure Digital Device Power Configuration
FET 0 1 2
TYPE FET Lo Byte SD_PWR_LB FET Hi Byte SD_PWR_HB
BITS 3:0 7:4 3:0
BIT TYPE Low Nibble High Nibble Low Nibble 0000b 0001b 1000b 1010b 0000b Disabled
DESCRIPTION
Disabled External FET enabled Internal FET with 100 mA power limit Internal FET with 200 mA power limit
3
7:4
High Nibble
0000b Disabled
8.2.4.5
BYTE 0
A8h: LED Blink Interval
NAME LED_BLK_INT DESCRIPTION The blink rate is programmable in 50 ms intervals. The high bit (7) indicates an idle state: `0' - Off `1' - On The remaining bits (6:0) are used to determine the blink interval up to a max of 63 x 50 ms.
8.2.4.6
BYTE 1
A9h: LED Blink Duration
NAME LED_BLK_DUR DESCRIPTION LED Blink After Access. This byte is used to designate the number of seconds that the GPIO1 LED will continue to blink after a drive access. Setting this byte to "05" will cause the GPIO 1 LED to blink for 5 seconds after a drive access.
8.2.5
Device ID Strings
These bytes are used to specify the LUN descriptor returned by the device. These bytes are used in combination with the device to LUN mapping bytes in applications where the OEM wishes to reorder and rename the LUNs. If multiple devices are mapped to the same LUN (a COMBO LUN), then the CLUN#_ID_STR will be used to name the COMBO LUN instead of the individual device strings. When applicable, the "SM" value will be overridden with xD once an xD-Picture Card has been identified.
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8.2.5.1
BYTE 6:0
AAh-B0h: Device 0 Identifier String
NAME DEV0_ID_STR Not applicable. DESCRIPTION
8.2.5.2
BYTE 6:0
B1h-B7h: Device 1 Identifier String
NAME DEV1_ID_STR DESCRIPTION This ID string is associated with the Memory Stick device.
8.2.5.3
BYTE 6:0
B8h-BEh: Device 2 Identifier String
NAME DEV2_ID_STR DESCRIPTION This ID string is associated with the Smart Media device.
8.2.5.4
BYTE 6:0
BFh-C5h: Device 3 Identifier String
NAME DEV3_ID_STR DESCRIPTION This ID string is associated with the Secure Digital / MultiMediaCard device.
8.2.5.5
BYTE 7:0
C6h-CDh: Inquiry Vendor String
NAME INQ_VEN_STR DESCRIPTION If bit 4 of the 1st attribute byte is set, the device will use these strings in response to a USB inquiry command, instead of the USB descriptor manufacturer and product ID strings.
8.2.5.6
BYTE 4:0
CEh-D2h: Inquiry Product String
NAME INQ_PRD_STR DESCRIPTION If bit 4 of the 1st attribute byte is set, the device will use these strings in response to a USB inquiry command, instead of the USB descriptor manufacturer and product ID strings.
8.2.5.7
BIT 7:0
D3h: Dynamic Number of LUNs
NAME DYN_NUM_LUN DESCRIPTION These bytes are used to specify the number of LUNs the device exposes to the host. These bytes are also used for icon sharing by assigning more than one LUN to a single icon. This is used in applications where the device utilizes a combo socket and the OEM wishes to have only a single icon displayed for one or more interfaces. If this field is set to "FF", the program assumes that you are using the default value and icons will be configured per the default configuration.
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8.2.5.8
BYTE 3:0
D4h-D7h: Device to LUN Mapping
NAME DEV_LUN_MAP DESCRIPTION These registers map a device controller (SD/MMC, SM, and MS) to a Logical Unit Number (LUN). The device reports the mapped LUNs to the USB host in the USB descriptor during enumeration. The icon installer associates custom icons with the LUNs specified in these fields. Setting a register to "FF" indicates that the device is not mapped. Setting all of the DEV_LUN_MAP registers for all devices to "FF" forces the use of the default mapping configuration. Not all configurations are valid. Valid configurations depend on the hardware, packaging, and OEM board layout. The number of unique LUNs mapped must match the value in the Section 8.2.5.7, "D3h: Dynamic Number of LUNs," on page 33.
8.2.5.9
BYTE 35:0
D8h-FBh: Not Applicable
NAME Not Applicable Not Applicable. DESCRIPTION
8.2.5.10
BYTE 3:0
FCh-FFh: Non-Volatile Storage Signature
NAME NVSTORE_SIG DESCRIPTION This signature is used to verify the validity of the data in the first 256 bytes of the configuration area. The signature must be set to `ATA2' for USB2250/50i/51/51i.
8.3
Default Configuration Option
The SMSC device can be configured via its internal default configuration. Please see Section 8.2.2, "EEPROM Data Descriptor" for specific details on how to enable default configuration. Please refer to Table 8.1 for the internal default values that are loaded when this option is selected.
8.3.1
External Hardware nRESET
A valid hardware reset is defined as assertion of nRESET for a minimum of 1 s after all power supplies are within operating range. While reset is asserted, the device (and its associated external circuitry) consumes less than 500 A of current. Assertion of nRESET (external pin) causes the following: 1. The PHY is disabled and the differential pair will be in a high-impedance state. 2. All transactions immediately terminate; no states are saved. 3. All internal registers return to the default state. 4. The external crystal oscillator is halted. 5. The PLL is halted. 6. The processor is reset. 7. All media interfaces are reset.
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8.3.1.1
nRESET for EEPROM Configuration
Hardware reset asserted Device Recovery/ Stabilization 8051 Sets Configuration Registers Attach USB Upstream Start completion request response
USB Reset recovery
Idle
t4 t1
nRESET
t2
t3
t5
t6
t7
VSS
Figure 8.1 nRESET Timing for EEPROM Mode Table 8.2 nRESET Timing for EEPROM Mode NAME t1 t2 t3 t4 t5 t6 t7 DESCRIPTION nRESET asserted Device recovery/stabilization 8051 programs device configuration USB attach Host acknowledges attach and signals USB reset USB idle Ready to handle requests (with or without data) 100 Undefined 5 20 MIN 1 500 50 100 TYP MAX UNITS sec sec msec msec msec msec msec
Note: All power supplies must have reached the operating levels mandated in Chapter 10, DC Parameters, prior to (or coincident with) the assertion of nRESET.
8.3.2
USB Bus Reset
In response to the upstream port signaling a reset to the device, the device does the following: 1. Sets default address to `0'. 2. Sets configuration to: Unconfigured. 3. All transactions are stopped. 4. Processor reinitializes and restarts. 5. All media interfaces are disabled.
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Chapter 9 AC Specifications
9.1 Oscillator/Crystal
Parallel Resonant, Fundamental Mode, 24 MHz 350 ppm.
XTAL1 (CS1 = CB1 + CXTAL1 )
C1 1M
C0 C2
Crystal
CL
XTAL2 (CS2 = CB2 + CXTAL2 )
Figure 9.1 Typical Crystal Circuit Table 9.1 Crystal Circuit Legend SYMBOL C0 CL CB CS CXTAL C1 C2 DESCRIPTION Crystal shunt capacitance Crystal load capacitance Total board or trace capacitance Stray capacitance XTAL pin input capacitance Load capacitors installed on OEM board IN ACCORDANCE WITH Crystal manufacturer's specification (See Note 9.1) OEM board design SMSC IC and OEM board design SMSC IC Calculated values based on Figure 9.2, "Capacitance Formulas" (See Note 9.2)
C1 = 2 x (CL - C0) - CS1 C2 = 2 x (CL - C0) - CS2
Figure 9.2 Capacitance Formulas Note 9.1 C0 is usually included (subtracted by the crystal manufacturer) in the specification for CL and should be set to `0' for use in the calculation of the capacitance formulas in Figure 9.2, "Capacitance Formulas". However, the OEM PCB itself may present a parasitic capacitance between XTAL1 and XTAL2. For an accurate calculation of C1 and C2, take the parasitic capacitance between traces XTAL1 and XTAL2 into account. Each of these capacitance values is typically approximately 18 pF.
Note 9.2
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9.2
Ceramic Resonator
24 MHz 350 ppm
XTAL1
24 MHz Ceramic Resonator
1M
XTAL2
Figure 9.3 Ceramic Resonator Usage with SMSC IC
9.3
External Clock
50% Duty cycle 10%, 24/48 MHz 350 ppm, Jitter < 100 ps rms. The external clock is recommended to conform to the signaling level designated in the JESD76-2 specification on 1.8 V CMOS Logic. XTAL2 should be treated as a no connect.
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Chapter 10 DC Parameters
10.1 Maximum Guaranteed Ratings
SYMBOL TA MIN -55 150 MAX UNITS C C VDD33 -0.5 -0.5 4.0 (3.3 V supply voltage + 2) 6 V V Please refer to JEDEC specification J-STD-020D. COMMENTS
PARAMETER Storage Temperature Lead Temperature 3.3 V supply voltage Voltage on USB+ and USB- pins Voltage on GPIO8, 9, 10 & 11
-0.5
VDD33 + 0.3
V
When internal power FET operation of these pins are enabled, these pins may be simultaneously shorted to ground or any voltage up to 3.63 V indefinitely, without damage to the device as long as VDD33 is less than 3.63 V and TA is less than 70oC.
Voltage on any signal pin Voltage on XTAL1 Voltage on XTAL2
-0.5 -0.5 -0.5
VDD33 + 0.3 3.6 VDD18 + 0.3
V V V
Note 10.1 Stresses above the specified parameters may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at any condition above those indicated in the operation sections of this specification is not implied.
Note 10.2 When powering this device from laboratory or system power supplies, it is important that the absolute
maximum ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on the DC output. When this possibility exists, it is suggested that a clamp circuit be used.
Voltage VDD33
tRT
3.3 V 100%
90%
VSS
10%
t10%
t90%
Time
Figure 10.1 Supply Rise Time Model Note 10.3
When powering the device, the maximum power supply ramp time should be set at a rate faster than 400 s. This speed is important to ensure that the device resets properly. Measure rise time at 10% and 90%.
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10.2
Operating Conditions
SYMBOL MIN MAX UNITS COMMENTS Ambient temperature in still air. TA TA VDD33 tRT 0 -40 3.0 0 -0.3 70 85 3.6 400 5.5 C C V s V (Note 10.4) (See Figure 10.1 and Note 10.3) If any 3.3 V supply voltage drops below 3.0 V, then the MAX becomes: (3.3 V supply voltage) + 0.5 5.5
PARAMETER Operating Temperature Commercial Part Industrial Part 3.3 V supply voltage 3.3 V supply rise time Voltage on USB+ and USB- pins
Voltage on any signal pin Voltage on XTAL1 Voltage on XTAL2
-0.3 -0.3 -0.3
VDD33 VDD33 VDD18
V V V
Note 10.4 A 3.3 V regulator with an output tolerance of 1% must be used if the output of the internal power FET's must support a 5% tolerance.
10.3
DC Electrical Characteristics
PARAMETER SYMBOL MIN TYP MAX UNITS COMMENTS
I, IPU, IPD Type Input Buffer Low Input Level High Input Level Pull Down Pull Up IS Type Input Buffer Low Input Level High Input Level Hysteresis ICLK Input Buffer Low Input Level High Input Level Input Leakage VILCK VIHCK IIL 1.4 -10 +10 0.5 V V A VIN = 0 to VDD33 VILI VIHI VHYSI 2.0 420 0.8 V V mV TTL Levels VILI VIHI PD PU 2.0 72 58 0.8 V V A A TTL Levels
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PARAMETER Input Leakage (All I and IS buffers) Low Input Leakage High Input Leakage O12 Type Buffer Low Output Level
SYMBOL
MIN
TYP
MAX
UNITS
COMMENTS
IIL IIH
-10 -10
+10 +10
A A
VIN = 0 VIN = VDD33
VOL
0.4
V
IOL = 12 mA @ VDD33= 3.3 V IOH = -12 mA @ VDD33= 3.3 V VIN = 0 to VDD33 (Note 10.5)
High Output Level
VOH
VDD33 - 0.4
V
Output Leakage
IOL
-10
+10
A
I/O12, I/O12PU & I/O12PD Type Buffer Low Output Level VOL 0.4 V IOL = 12 mA @ VDD33= 3.3 V IOH = -12 mA @ VDD33= 3.3 V VIN = 0 to VDD33 (Note 10.5)
High Output Level
VOH
VDD33 - 0.4
V
Output Leakage
IOL PD PU
-10
+10
A A A
Pull Down Pull Up IO-U (Note 10.6) I-R (Note 10.7)
72 58
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PARAMETER I/O200 Integrated Power FET for GPIO8, GPIO9, GPIO10, & GPIO11 High Output Current Mode Low Output Current Mode (Note 10.8) On Resistance (Note 10.8) Output Voltage Rise Time Supply Current Unconfigured Supply Current Active Full Speed High Speed Supply Current Suspend Industrial Temperature Suspend
SYMBOL
MIN
TYP
MAX
UNITS
COMMENTS
IOUT IOUT RDSON tDSON ICCINIT ICC ICC ICSBY ICSBYI
200 100
mA mA s mA mA mA A A
VdropFET = 0.46 V VdropFET = 0.23 V IFET = 70 mA CLOAD = 10 F
2.1
800 80 110 135 350 350 90 140 165 750 950
VDD33 = 3.3 V
VDD33, V = 3.3 V
Note 10.5 Output leakage is measured with the current pins in high impedance. Note 10.6 See The USB 2.0 Specification, Chapter 7, for USB DC electrical characteristics Note 10.7 RBIAS is a 3.3 V tolerant analog pin. Note 10.8 Output current range is controlled by program software, software disables FET during short circuit condition. Note 10.9 The assignment of each Integrated Card Power FET to a designated Card Connector is controlled by both firmware and the specific board implementation. Firmware will default to the settings listed in Table 11.1, "GPIO Usage," on page 43. Note 10.10 The 3.3 V supply should be at least at 75% of its operating condition before the 1.8 V supply is allowed to ramp up.
10.4
Capacitance
TA = 25C; fc = 1 MHz; VDD, VDDP = 1.8 V Table 10.1 Pin Capacitance LIMITS PARAMETER SYMBOL CXTAL MIN TYP MAX 2 UNIT pF TEST CONDITION All pins (except USB pins and pins under test) are tied to AC ground.
Clock Input Capacitance
Input Capacitance Output Capacitance
CIN COUT
10 20
pF pF
SMSC USB2250/50i/51/51i
41
Revision 2.0 (09-29-09)
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
10.5
Package Thermal Specification
Table 10.2 128-Pin VTQFP Package Thermal Parameters PARAMETER VELOCITY (meters/sec) 0 1 2 SYMBOL VALUE 55 UNIT
Thermal Resistance
JA
48 45 18
C/W
Junction-to-Top-of-Package
0 1 2
JT
18 18
C/W
Note 10.11 Thermal parameters are measured or estimated for devices with the exposed pad soldered to thermal vias in a multilayer 2S2P PCB per JESD51. Thermal resistance is measured from the die to the ambient air.
Revision 2.0 (09-29-09)
42
SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller Datasheet
Chapter 11 GPIO Usage
Table 11.1 GPIO Usage NAME GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16-32 ACTIVE LEVEL H H H H H L H L L L L L L L L USER LED CF_DMARQ / RXD VBUS_DET SCL / xD_ID SDA SD_WP CF_DMACK / TXD CRD_PWR0 CRD_PWR1 CRD_PWR2 CRD_PWR3 MS_INS CF_nCD xD_nCD SD_nCD GPIO [32:16] SYMBOL DESCRIPTION AND NOTE LED indicator Compact Flash DMA request / Receive Port of Debugger USB Vbus detect Serial EEPROM clock output / xDPicture Card detect Serial EEPROM data SD Write Protect Compact Flash DMA acknowledge / Transmit Port of Debugger Card Power Control Card Power Control Card Power Control Card Power Control Memory Stick Card Insertion Compact Flash card detect xD-Picture Card detect Secure Digital card detect User defined
SMSC USB2250/50i/51/51i
43
Revision 2.0 (09-29-09)
DATASHEET
R EVISION HISTORY REVISION SEE SPECF R T PAGE FORREVI SIONHISTOR ON Y DESCRIPTION DA TE REL EASED BY
5 D1 3 0.25
E1/4
D R2
Chapter 12 Package Outline
Revision 2.0 (09-29-09)
R1
GAUGE PLANE
0-7
b
D 1/4
3 2 E L1 e
L
4
E1
DETAIL "A"
TOP VIEW
44
SEE DETAIL "A" C A
SEAT ING PLANE
Figure 12.1 128-Pin VTQFP, 14x14x1.0 mm Body, 2.0 mm Pitch
DATASHEET
c ccc C A1
A2
SIDE VIEW
NO T ES : 1. AL L D IM EN SION S AR E IN MIL LIME TE R. 2 . TR U E POSITION S PR EAD TOLE RA NC E OF EAC H L EA D IS 0 .0 3 5m m MAXIMU M. 3 . D IMEN SION S "D 1" A ND " E1 " DO N OT IN CL U DE M OLD PR OTRU SION S. M AX IMU M A LL OWED P ROTR U SIO N IS 0 .2 5 mm PER SIDE . 4 . D IME NSION "L" IS M EAS UR ED AT TH E GA UGE P LA NE , 0 .25 mm A BOVE TH E SEA TIN G P LAN E. 5 . D ETA IL S ON P IN 1 ID ENTIFIER ARE OPTIONA L BU T MU ST BE L OCA TED WITH IN TH E ZONE IN D IC ATE D.
UN LESS O H WISE SPEC T ER IFIED DIM SION AR INMILLIMETERS EN SE AN TOLERANC ARE: D ES DECIMAL X.X 0.1 X.XX 0.05 X.XXX 0.025 AN GULAR 1 TH R ANG PROJ T I N ID LE EC O 80 ARKAY D RIVE H PPAUGE, N 11788 AU Y U SA
TITLE INTER PRET D ANDT O PER IM L ASME Y14 M- 1994 .5 MATER IAL NAME D RAWN D ATE
3-D VIEW
FINISH
S. K. ILI EV
C HECKED
12/17/04 PR T WITH "SC IN ALE TO FIT" DO N S C OT ALE DR AWIN G
PACKAGE OUTLINE 128 VTQFP-14x14x1.0mm BODY-0.4mm PITCH
DWG N UMBER R EV
S. K. ILI EV
APPRO VED
12/17/04
SC E AL
MO-128-VTQFP-14x14x1.0
STD C OMPLIAN E C SH EET
C S. K. ILI EV 12/17/04 1:1 JE DEC: MS -026 (D) 1 OF 1
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
SMSC USB2250/50i/51/51i
Datasheet

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